This invention relates to sampling apparatus and, more particularly, to sampling apparatus which is capable of sampling an input signal at very high sampling rates in excess of 1,000 MHz, and to analog-to-digital converting apparatus which incorporates such sampling apparatus.
In conventional analog-to-digital converters, an input analog signal is sampled at a predetermined quantizing rate, and each sample of the input signal is quantized and converted to a corresponding digital signal representative thereof. In accordance with the well-known Nyquist theory, the minimum sampling rate must be at least twice the highest frequency of the input signal. Difficulties arise when the input signal includes very high frequency components.
One technique which has been proposed to digitize a high frequency analog signal incorporates a dual cathode ray tube wherein one electron beam is used to write, or store, the high frequency input signal on a suitable target, and the other beam is used to sample the signal stored on that target, the sampled signals thereafter being digitized. The stored signal may be read at a relatively slow rate that is compatible with typical slow-speed analog-to-digital converters. This system is, however, complex and expensive.
Another proposal for digitizing higher frequency analog signals incorporates the use of charge coupled devices (CCDs). The CCDs are clocked at a relatively high rate that is compatible with the high frequencies of the input signal so as to store and shift from one stage to the next discrete samples of that input signal. When a suitable number of samples has been stored on the CCD elements, further sampling is interrupted, and the stored samples then are shifted out of the CCD at a slow rate and converted to corresponding digital values. Alternatively, only selected ones of the stored signals are digitized, thereby reducing the effective rate of the samples which are converted into digital form.
Yet another proposal contemplates the use of several analog-to-digital converters connected in parallel to receive the input analog signal. These converters are sampled, or triggered, sequentially so as to produce corresponding sequential digital values of the input signal. This, however, requires the input signal to be amplified substantially, and conventional amplifiers that exhibit satisfactory gain also exhibit a relatively slow speed of response. Hence, the amplifier is not capable of following the rapid changes in the higher frequency components of the input signal. Also, the several converters unavoidably exhibit different sampling characteristics, thus making accurate reconstruction of the original signal quite difficult.
Yet a further proposal contemplates the use of a tapped delay line having sampling circuits coupled to each tap. When the input signal has been propagated through the delay line, all of the sampling circuits may be triggered so as to produce corresponding samples of the input signal related to the incremental delays between adjacent taps. In this proposal, however, when a sample is taken at one tap, interference due to that sample is introduced into the delay line so as to distort the delayed signal. Consequently, the next sample will be a sample of the distorted signal, thereby introducing errors into the analog-to-digital conversion.
The foregoing proposals exhibit highly complex and expensive apparatus and, moreover, are not capable of operating satisfactorily at the high sampling rates which often are desired. In particular, none of the aforementioned proposals contemplates a relatively simple, low-cost sampling circuit which is operable to sample an input signal in excess of 1,000 MHz (i.e. 1,000,000,000 samples per second).
While it has been proposed to produce sampling pulses of very narrow width, such as on the order of 1 psec (1.times.10.sup.-12 sec), in order to sample high frequency or transient components, such narrow samples typically are generated at a very slow sampling rate, such as one narrow sample every one msec. Hence, the information that may be present in the interval between adjacent samples will not be detected. It is desirable, therefore, to generate succesive samples at the rate of one every nanosecond (one every 10.sup.-9 seconds).